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集成電路中的現代半導體器件(英文版半導體科學與技術)/國外信息科學與技術優秀圖書繫列
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498-722
【介質】 book
【ISBN】9787030326652
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內容介紹



  • 出版社:科學
  • ISBN:9787030326652
  • 作者:(美)胡正明
  • 頁數:351
  • 出版日期:2012-02-01
  • 印刷日期:2016-06-01
  • 包裝:平裝
  • 開本:16開
  • 版次:1
  • 印次:2
  • 字數:450千字
  • 胡正明所著的《集成電路中的現代半導體器件(
    英文版半導體科學與技術)/國外信息科學與技術優秀
    圖書繫列》主要介紹與集成電路相關的主流半導體器
    件的基本原理,包括PN結二極管、MOsFET器件和雙極
    型晶體管(BJT),同時介紹了與這些半導體器件相關
    的集成工藝制造技術。本書作者是美國工程院院士、
    中國科學院外籍院士,多年從事半導體器件與集成電
    路領域的前沿性研究工作。本書內容簡明扼要,重點
    突出,深度掌握適宜,講解深入淺出,理論聯繫實際
    。本書可作為微電子及相關專業本科生教材,也可以
    作為微電子及相關領域工程技術人員的參考書。
  • Preface
    1 Electrons and Holes in Semiconductors
    1.1 Silicon Crystal Structure
    1.2 Bond Model of Electrons and Holes
    1.3 Energy Band Model
    1.4 Semiconductors, Insulators, and Conductors
    1.5 Electrons and Holes
    1.6 Density of States
    1.7 Thermal Equilibrium and the Fermi Function
    1.8 Electron and Hole Concentrations
    1.9 General Theory ofnandp
    1.10 Carrier Concentrations at Extremely High and Low Temperatures
    1.11 Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    2 Motion and Recombination of Electrons and Holes
    2.1 Thermal Motion
    2.2 Drift
    2.3 Diffusion Current
    2.4 Relation Between the Energy Diagram and V,%
    2.5 Einstein Relationship Between D and u
    2.6 Electron-Hole Recombination
    2.7 Thermal Generation
    2.8 Quasi-Equilibrium and Quasi-Fermi Levels
    2.9 Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    3 Device Fabrication Technology
    3.1 Introduction to Device Fabrication
    3.2 Oxidation of Silicon
    3.3 Lithography
    3.4 Pattern Transfer-Etching
    3.5 Doping
    3.6 Dopant Diffusion
    3.7 Thin-Film Deposition
    3.8 Interconnect-The Back-End Process
    3.9 Testing, Assembly, and Qualification
    3.10 Chapter Summary-A Device Fabrication Example
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    4 PN and Metal-Semiconductor Junctions
    Part 1 PN Junction
    4.1 Building Blocks of the PN Junction Theory
    4.2 * Depletion-Layer Model
    4.3 Reverse-Biased PN Junction
    4.4 Capacitance-Voltage Characteristics
    4.5 Junction Breakdown
    4.6 Carrier Injection Under Forward Bias--Quasi-Equilibrium Boundary Condition
    4.7 Current Continuity Equation
    4.8 Excess Carriers in Forward-Biased PN Junction
    4.9 PN Diode IV Characteristics
    4.10 Charge Storage
    4.11 Small-Signal Model of the Diode
    Part 2 Application to Optoelectronic Devices
    4.12 Solar Cells
    4.13 Light-Emitting Diodes and Solid-State Lighting
    4.14 Diode Lasers
    4.15 Photodiodes
    Part Ⅲ: Metal-Semiconductor Junction
    4.16 Schottky Barriers
    4.17 Thermionic Emission Theory
    4.18 Schottky Diodes
    4.19 Applications of Schottky Diodes
    4.20 Quantum Mechanical Tunneling
    4.21 Ohmic Contacts
    4.22 Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    5 MOS Capa
    5.1 Flat-Band Condition and Flat-Band Voltage
    5.2 Surface Accumulation
    5.3 Surface Depletion
    5.4 Threshold Condition and Threshold Voltage
    5.5 Strong Inversion Beyond Threshold
    5.6 MOS C-V Characteristics
    5.7 Oxide Charge--A Modification to Vfband Vt
    5.8 Poly-Si Gate Depletion--Effective Increase in Tox
    5.9 Inversion and Accumulation Charge-Layer Th
    and Quantum Mechanical Effect
    5.1 0CCD Imager and CMOS Imager
    5.1 1Chapter Summary
    PRO
    REFERENCES
    GENERAL REFERENCES
    6 MOS Trans
    6.1 Introduction to the M
    6.2 Complementary MOS (CMOS) Techn
    6.3 Surface Mobilities and High-Mobility
    6.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping
    6.5 QINVin M
    6.6 Basic MOSFETIV Model
    6.7 CMOS Inverter--A Circuit Example
    6.8 Velocity Saturation
    6.9 MOSFET IV Model with Velocity Saturation
    6.1 0Parasitic Source-Drain Resistance
    6.1 1 * Extraction of the Series Resistance and the Effective Channel Length
    6.1 2Velocity Overshoot and Source Velocity Limit
    6.1 3Output Conductance
    6.1 4 * High-Frequency Performance
    6.1 5 = MOSFET Noises
    6.1 6SRAM, DRAM, Nonvolatile (Flash) Memory Devices
    6.1 7Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    7 MOSFETs in ICs-Scaling, Leakage, and Other T
    7.1 Technology Scaling--For Cost, Speed, and Power Consumption
    7.2 Subthreshold Current--"Off" Is Not Totally"Off"
    7.3 * Vt Roll-Off--Short-Channel MOSFETs Leak
    7.4 = Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage
    7.5 How to Reduce Wdep
    7.6 Shallow Junction and Metal SourceDrain MOSFET
    7.7 Trade-Off Betweenon andoff and Design for Manufacturing
    7.8 Ultra-Thin-Body SOl and Multigate MOSFETs
    7.9 Output Conductance
    7.10 Device and Process Simulation
    7.11 MOSFET Compact Model for Circuit Simulation
    7.12 Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    8 Bipolar Trans
    8.1 Introduction to the BJT
    8.2 Collector Current
    8.3 Base Current
    8.4 * Current Gain
    8.5 Base-Width Modulation by Collector Voltage
    8.6 Ebers-Moll Model
    8.7 Transit Time and Charge Storage
    8.8 Small-Signal Model
    8.9 Cutoff Frequency
    8.10 Charge Control Model
    8.11 Model for Large-Signal Circuit Simulation
    8.12 Chapter Summary
    PROBLEMS
    REFERENCES
    GENERAL REFERENCES
    Appendix Ⅰ
    Derivation of the Density of States
    Appendix Ⅱ
    Derivation of the Fermi-Dirac Distribution
    Appendix Ⅲ
    Self-Consistencies of Minority Carrier As
    Answers to Selected Problems
    Index
 
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